1. Field of the Invention
The present invention relates to a crossbar switch for a moderately high speed (100 nsec) coarse grain parallel processing computer node having a performance in the supercomputing range.
2. Description of the Related Art
Supercomputers are typically defined as computers capable of executing at least 100 million floating point operations per second (MFLOPS) and providing memory transfer rates of several 10's of MWORDS per second. Conventional supercomputers, such as the Cray supercomputer, achieve this phenomenal performance by using an extremely fast clock, on the order of 4 ns per cycle. Unfortunately, a high-speed clock generates a considerable amount of heat which requires that such supercomputers remain submerged in liquid for cooling purposes. The design of conventional supercomputers also requires a large physical size for housing large amounts of hardware, thus occupying typically a small room. Accordingly, such supercomputers are essentially limited to laboratory applications. Many present-day militarized and ruggedized applications require computational throughput rates in the supercomputer range and their requirements can not be satisfied by today's standard commercial supercomputers.